1. Technical Field
The present invention relates to a data processing apparatus.
2. Related Art
The reconfigurable circuit (called also the “programmable logic circuit”) such as PLD (Programmable Logic Device), FPGA (Field Programmable Gate Array), or the like, whose internal configuration of logical circuits is changeable, is spreading. As PLD or FPGA, the device whose internal configuration of logical circuits is set upon starting the circuit is common, but the device whose circuit configuration of logical circuits is changeable in operation has also been developed.
In this case, even though the circuit configuration is changeable in operation, a time required for a change (rewriting) of the circuit configuration is vastly long in comparison with the Dynamically Reconfigurable Processor (DRP) that has been developed while focusing on the dynamic change of the circuit configuration. Therefore, the technology to reduce a rewriting time of the circuit configuration has been proposed in the related art.